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MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, with 64-bit versions added later. Multiple revisions of the MIPS instruction set exist, including MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64. The current revisions are MIPS32 and MIPS64 . MIPS32 and MIPS64 define a control register set as well as the instruction set.

MIPS
Designer MIPS Technologies, Inc., Imagination Technologies
Bits 64-bit (32→64)
Introduced 1981; 35 years ago (1981)
Design RISC
Type Register-Register
Encoding Fixed
Branching Compare and branch
Endianness Bi
Extensions MDMX, MIPS-3D
Registers
General purpose 31 plus always-zero R0
Floating point 32 (paired DP for 32-bit)

MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by MIPS Technologies (formerly MIPS Computer Systems, Inc.). The early MIPS architectures were 32-bit, with 64-bit versions added later. Multiple revisions of the MIPS instruction set exist, including MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64. The current revisions are MIPS32 (for 32-bit implementations) and MIPS64 (for 64-bit implementations). MIPS32 and MIPS64 define a control register set as well as the instruction set.

Several optional extensions are also available, including MIPS-3D which is a simple set of floating-point SIMD instructions dedicated to common 3D tasks, MDMX (MaDMaX) which is a more extensive integer SIMD instruction set using the 64-bit floating-point registers, MIPS16e which adds compression to the instruction stream to make programs take up less room, and MIPS MT, which adds multithreading capability.

Computer architecture courses in universities and technical schools often study the MIPS architecture. The architecture greatly influenced later RISC architectures such as Alpha.

MIPS implementations are primarily used in embedded systems such as Windows CE devices, routers, residential gateways, and video game consoles such as the Nintendo 64, Sony PlayStation, PlayStation 2 and PlayStation Portable. It used to be popular in supercomputers but all such systems have dropped off the TOP500 list. Until late 2006, they were also used in many of SGI's computer products. MIPS implementations were also used by Digital Equipment Corporation, NEC, Pyramid Technology, Siemens Nixdorf, Tandem Computers and others during the late 1980s and 1990s. In the mid to late 1990s, it was estimated that one in three RISC microprocessors produced was a MIPS implementation. Windows NT supported MIPS until the release of Windows NT 4.0 SP3 in 1997.

MIPS is a modular architecture supporting up to four coprocessors (COP0/1/2/3). In MIPS terminology, COP0 is the System Control Coprocessor (main part of the CPU), COP1 is an optional FPU and COP2/COP3 are undefined optional coprocessors. For example, in the original Playstation game console, COP0 is the System Control Coprocessor and COP2 is Geometry Transformation Engine (GTE). In the Playstation 2 game console, COP0 is a Toshiba R5900 chip, COP1 is a FPU and COP2 is VPU0.

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